Abstract

Abstract Various energy-saving designs have been proposed for reducing the power consumption of processors through dynamic voltage and frequency scaling (DVFS). When dynamic random access memory (DRAM) or peripheral power consumption is high, dynamic power management (DPM) can be adopted to dynamically activate or deactivate devices or to switch them into energy-saving states during idle periods. This paper proposes a heterogeneous resource management mechanism to manage device scheduling for multiple tasks and task scheduling in a processor. A wireless network monitoring system was analyzed as a case study, wherein a resource sharing mechanism was developed for managing the scheduling of multiple wireless adapters, and the concept of instantaneous utilization was leveraged to enable chain-based task scheduling. This paper explores DVFS and DPM energy saving techniques for peripherals and a processor by considering both the required device time and processor time for each task without violating performance requirements under constraints of buffer size. The proposed algorithms were then implemented on a wireless network monitoring system and real traces were collected from a laboratory and downloaded from the UMass Trace Repository for use as inputs. A series of experiments was conducted to evaluate the quality of our algorithms for energy saving within the constraints of system performance requirements and hardware resources.

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