Energy Requirement and Speed Analysis of Electrical and Free-Space Optical Digital Interconnections

Abstract

Scaling of VLSI technology has been dramatically increasing microelectronic device densities and speeds. However, the interconnection technology between devices does not advance proportionally. Limited available interconnect materials compatible with VLSI and packaging technologies, increased wire resistance as a result of scaling, residual wire capacitance due to fringing fields and fields between interconnect wires are among the factors that prohibit drastic improvement of the electrical interconnect performance. As a result, the performance of VLSI systems become increasingly more dominated by the performance of long interconnects. To overcome this limitation, free-space optical interconnects have been suggested, where long electrical interconnects are replaced by an optical transmitter, a. photodetector, and interconnection optics between them [2, 10. 13–15,19, 22, 27]. This scheme, although devoid of electrical interconnection para.sitics, has its own difficulties. Unavailability of monolithically integrated optical transmitters on silicon imposes hybrid integration schemes with larger parasitic capacitance and increased cost. Transformation of information from electrical to optical domain and vice versa introduces severe inefficiencies into the energy budget. There are voltage incompatibility issues between some transmitter technologies and VLSI technology as well.