Energy efficient low density parity check scheme for body channel communication using FPGA

Abstract

An arrangement of an on-body to on-body thin-ranging channel along with various issues is deliberated. Time-area appearances of body channel communication (BCC) of human are considered by using a Field Programmable Gate Array (FPGA) at variable transmission distances and signal frequencies. In Human body channel communication (HBCC), wide band signaling (WBS) technique is characterized as well as correlated with existing devices and are more stable and expend very less power. But based on the movement of human body, wide band signaling is more sensitive. The WBS constructed BCC is established in FPGA platform at diverse broadcast distances and signal frequencies by using Non Return to Zero (NRZ) encoded information. In this strategy presented, the information encoded by NRZI data at the transmitter part are driven accurately to the human based BCC. At the receiver part, the FPGA enhanced the conventional signals and in addition, the proposed LDPC technique circuit enhances the accepted frequency decoded point information from irregular nodes. The presented LDPC technique based wide band signaling BCC transceiver is acknowledged in the typical 65 nm CMOS executing process. The core region is found as 0.133 mm2. Power consumption of LDPC technique based WBS- BCC transceiver is 1.07 mW at 40Mb/s. The bit energy is 0.02 nJ/b.