Abstract

While energy efficiency is essential to extend the battery life of embedded devices, performance cannot be ignored. High performance superscalar embedded processors are more energy efficient than low performance scalar processors, however, they consume more power which is very limited in battery o

Highlights

  • The challenge in designing energy efficient embedded devices is how to increase the device computational performance while using the least amount of power

  • The average increase in IPC for a dual issue processor is around 40%

  • The processor delivers an average 40% higher IPC than a single issue processor while consuming only 20% more power

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Summary

Introduction

The challenge in designing energy efficient embedded devices is how to increase the device computational performance while using the least amount of power. The Cortex-M4 scalar processor consumes much lower power than the Cortex-A7, it can only issue a single instruction per cycle which limits its performance potential. The reason superscalar processors consume more power than scalar processors is because they use aggressive and complex hardware techniques, such as out-of-order issue, speculative execution, etc., to issue more than one instruction per cycle. The IPC performance of these benchmarks is well above average; it is close to the max issue capacity of a dual issue processor These results confirm that there is an abundance of ILP in embedded programs that can be extracted using minimal effort. We propose a dual issue embedded processor that uses simple hardware techniques to extract available ILP from applications.

Processor Survey
Other Areas of Embedded Processor Design
Benchmarks
Base Processor Architecture
Result
FPGA Implementation
Dual Issue Processor
Register file
Related Work
True Dependency Stalls
Branch Misprediction
Duplication of Resources
Simulation
Conclusion
Full Text
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