Abstract
In this article, we perform a uniform benchmarking for the convolutional neural network (CoNN) based on the cellular neural network (CeNN) using a variety of beyond-CMOS technologies. Representative charge-based and spintronic device technologies are implemented to enable energy-efficient CeNN related computations. To alleviate the delay and energy overheads of the fully connected layer, a hybrid spintronic CeNN-based CoNN system is proposed. It is shown that low-power FETs and spintronic devices are promising candidates to implement energy-efficient CoNNs based on CeNNs. Specifically, more than $10\times $ improvement in energy-delay product (EDP) is demonstrated for the systems using spin diffusion-based devices and tunneling FETs compared to their conventional CMOS counterparts.
Highlights
C MOS technology scaling faces major challenges as we approach sub-10-nm technology nodes [1]
cellular neural network (CeNN) CELL DESIGN USING EMERGING TECHNOLOGIES we describe two types of CeNN cell designs that are implemented with a variety of beyond-CMOS devices, including charge-based FETs and spintronic devices
NEURAL NETWORK DESIGN Using the CeNN cell building blocks described in Section II, we have developed a CeNN-friendly convolutional neural network (CoNN) for the MNIST recognition task [55], where the system classifies each handwritten digit (0–9) that is represented by a 28 × 28 pixel image
Summary
C MOS technology scaling faces major challenges as we approach sub-10-nm technology nodes [1]. We adopt a recent architecture-level work to implement a novel way of employing cellular operations to perform the convolution, which constitutes the core computations in CoNNs [31] This creates a unique opportunity to develop a low energy/delay mixed-signal system composed of CeNNs for realizing widely adopted CoNNs. The CeNN-based CoNN benchmarking framework presented here is generic and applicable to a wide range of beyondCMOS charge- and spin-based devices. CeNN CELL DESIGN USING EMERGING TECHNOLOGIES we describe two types of CeNN cell designs that are implemented with a variety of beyond-CMOS devices, including charge-based FETs and spintronic devices. This helps us to identify promising device candidates so that a more thorough investigation can be done for those devices in the future
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