Energy Efficient Adaptive Approach for Dependable Performance in the presence of Timing Interference

Abstract

Silicon design miniaturization has dramatically improved the integration scale in one chip, highlighting in the same time reliability issues. Error-correction mechanisms deal with these issues ensuring the operation Reliability, Availability and Serviceability (RAS), paying a price in performance. The current study deploys a run-time mechanism that mitigates the correction overhead, guaranteeing the performance dependability. In this direction, a closed-loop controller absorbs the RAS-induced delay by triggering Dynamic Voltage and Frequency Scaling (DVFS) schemes. The novelty is the run-time adjustment of the DVFS responses to the identified performance variability norms. To achieve this, we exploit an adaptive scenario scheduler that reorganizes the scenario hierarchy at run-time. Compared against an approach utilizing a 30% operation frequency guardband, the proposed configuration achieves an 83.9% exploitation of the nominal improvement margins that corresponds to an energy gain up to 15%.