Endurance Improvement of Phase Change Memory Based on High and Narrow RESET Currents

Abstract

Endurance improvement is a crucial work for phase change memory (PCM) which has always been the focus of researchers, but fewer studies concentrate on parameter optimization to improve endurance. In this paper, the correlation between the RESET condition and the endurance of PCM has been investigated systematically based on sample cells of a 4 Mb embedded PCM chip through Statistical analysis. It is evidently clear from the test results that high and narrow RESET condition can bring a significant improvement in endurance. And a new test-time-saving method for optimizing RESET condition to improve endurance is proposed. Further, the power consumption and the temperature distribution of PCM during the RESET process has been studied. The results confirmed that high heating speed and less thermal damage to the operating electrode originated from the high-narrow RESET pulse all together account for the improvement of endurance.