Enabling Heterogeneous Integration for Next Generation Fan-Out Applications Using Full-Field Projection Scanning

Abstract

The demand for higher functionality devices drives integration technologies in the third dimension to overcome limitations in Moore's Law. One popular example for 3D Integration is Package-on-Package (PoP), where memory stacks are mounted above the processor. Heterogeneous Integration (HI) is one of the key technologies to meet future fan-out (FO) application standards using higher bandwidths and higher chip-to-chip interconnection density or IO density. However, HI brings new challenges like large-area panel production and design limitations. Fast increasing package size in combination with insufficient increase in stepper reticle size is inhibiting designs for large packages and HI applications. A solution which provides limitless design and fine resolution patterning capabilities is a full-field projection scanner. For next generation FO applications, a projection scanner provides superior performance compared to a stepper by enabling limitless design, allowing dies of any size and patterning of non-repeated features at higher throughput and lower cost. This paper presents technical challenges and provides solutions for future HI FO applications, using a full-field exposure system for large package integration, eliminating low yielding stitching steps. High accuracy overlay, fine resolution for RDL routing and large depth of focus (DOF) for thick resist applications with high aspect ratio is demonstrated. The extendibility to large panel packaging integration is discussed.