Abstract

A parallel receiver architecture for multiple input multiple output (MIMO) channel sounding application is presented with a software-defined radio (SDR)-based field-programmable gate array (FPGA) implementation. The receiver covers phase coherent reception via shared local oscillator (LO) and reference clock, a timing scheme synchronous to the antenna switching at the transmitter, and an integrated automatic gain control (AGC) in all receive channels. It is built with SDRs (NI USRP-2955, X310 series with TwinRx daughterboards). The use of these off-the-shelf hardware components reduces the costs of the sounding system. The FPGA implementation together with the system parameters of the chosen hardware allows a minimum AGC update interval of approx. 44.38$\mu \mathrm{s}$. Our setup demonstrates the applicability of state-of-the-art SDRs as a sounding system for continuous acquisition of the time variant, space, and frequency selective radio propagation channel.

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