Emulators as a Tool for Control Digital System Software Debugging

Abstract

The simulation of control digital systems at the architecture level, that is, emulation of the instruction set, memory cells and internal programmable registers, as well as the interrupt system and direct memory access is considered. Emulators are used for debugging embedded digital system software and in the development of new custom processors. Requirements for emulators are formalized. It is shown that the main requirements are adequate simulation of digital systems at the architecture level, the presence of a set of convenient debugging modes, as well as high efficiency of emulators, that is, the minimum possible average number of instrumental computer instructions required to simulate one instruction of the target digital system. A classification of the debugging capabilities of emulators and possible ways of implementing debugging modes is given. The composition of the emulators is described. A graphical model of the structure of the emulator is proposed. The simulation process for each instruction is presented as a sequence of execution of smaller operations. If different instructions include the same operations, these operations can be performed by the same software modules. These modules can be included in all the corresponding blocks of the emulator that simulate the execution of instructions, or the emulator can include only one copy of each operational program module, and the module can be accessed while simulating the corresponding instruction. Determination of the structure of the emulator is formalized as an extreme task, the objective function of which is the minimum average time for simulating the execution of one instruction of the target digital system, and the limitation is the maximum allowable memory size of the instrumental computer occupied by the emulator. A practical method for determining the structure of the emulator is proposed.