Year-end Sale % OFF 
Abstract
Under the unavailability of some components of a complex system, the Hardware In the Loop (HIL) tool allows the emulation of other subsystems. When these devices are not available, a customized emulator can be developed based on the Piecewise Linear Model (PWLM) and a numerical method for solving the differential equations system. However, these implementations require the use of a Field Programmable Gate Array (FPGA) with extensive hardware resources. In this article we propose the use of switching functions for the modeling of power converters of a Hybrid Power System (HPS), allowing the reduction of hardware resources of the FPGA, and the number of steps per switching cycle is increased. The results are compared with SABER simulations and a PWLM evaluated with the Euler method.
Published Version (
Free)
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
