Abstract
This article presents a systematic empirical modeling approach in fully depleted silicon-on-insulator (FDSOI) CMOS for large-signal simulation in power amplifier applications. The model is constructed from multibias S-parameter measurements up to 67 GHz. The frequency dispersions in transconductance and output conductance are addressed by two independent radio frequency (RF) current sources. Angelov's current formula is modified to adapt to the FDSOI transistors. Load-pull measurements are performed for the large-signal verification in a non-50-Ω environment. The model accurately predicts the nonlinear characteristics of the device under test and the harmonic components. The time-domain waveforms also show excellent agreement to the simulation.
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