Emitter-Coupled Spin-Transistor Logic: Cascaded Spintronic Computing Beyond 10 GHz

Abstract

The cascading of logic gates is a critical challenge for the development of spintronic logic circuits. Here we propose the first logic family exploiting magnetoresistive bipolar spin-transistors to achieve a complete spintronic logic family in which logic gates can be cascaded. This logic family, emitter-coupled spin-transistor logic (ECSTL), is an extension of emitter-coupled logic (ECL) that leverages the advanced features of spintronic devices. The current through the ECL differential amplifier is routed to create a magnetic field that modulates the magnetoamplification of the spin-transistors. This cascading mechanism supplements the voltage cascading available in conventional ECL, providing additional inputs to each logic stage. Each gate therefore has increased logical functionality, leading to logic minimization and compact circuits. No additional current is required to employ this added spintronic switching, resulting in improved speed, area, and power characteristics. This logic family achieves a power-delay product 10-25 times smaller than conventional ECL, inspiring a pathway for high-performance spintronic computing beyond 10 GHz.