Abstract

This paper presents a CM noise suppression technique from self-calibration of a 20-Gb/s source-series terminated (SST) driver using an on-chip process monitoring circuit designed and simulated in a 65-nm CMOS process. An unbalanced charging and discharging loop results in an asymmetric rise and fall time of the output signal and is an intrinsic source of the CM noise. For an SST driver, the CM noise effect is especially aggravated under process corner variations due to push-pull NMOS configuration. The on-chip sensor circuit monitors and detects all possible process corners over the entire temperature range. The control circuit operates to self-calibrate the output driver to compensate for the process corner variations and results in a 15% higher symmetric rise and fall time of the output signal for the worst case scenario. The simulation results indicate that the proposed technique reduces the peak CM noise by 7.2x (−86%) without power overhead, as it is a background monitoring and self-calibration scheme.

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