Abstract
In a totally self-checking (TSC) design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. A method of designing checkers that solves this difficulty is proposed. The method uses TSC checkers based on flip-flops instead of using the mostly combinational checkers now available. Two design applications are presented: TSC checkers for arithmetic AN codes, and a TSC iterative logic array.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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