Abstract
In this paper we present simulation results obtained with our electro-thermal device simulator when modeling different technology generations of nano-scale fully depleted Silicon-on-Insulator (FD-SOI) devices. The electro-thermal simulator is based on a combined ensemble Monte Carlo device simulator coupled to moment expansion of the phonon Boltzmann transport equations. In particular, we stress out the importance of the temperature boundary conditions for digital and analog circuits and the use of the full model which takes into account both temperature and thickness dependence (which is particularly important for thin silicon films) of the thermal conductivity.
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