Abstract
Electrothermal transport and crystallization dynamics govern the speed and bit stability of multibit phase-change memory (PCM). This paper develops a transient simulation methodology incorporating electrical, thermal, and phase transition models to investigate multibit PCM cell structures and programming strategies. The simulations evaluate two standard PCM structures, namely, the mushroom cell and the confined pillar cell, with feature sizes smaller than 40 nm. The transient simulation captures the phase distribution and cell resistance profile, which are corroborated by transmission electron microscope imaging and the corresponding measured resistance values. This paper also explores a more compact architecture, i.e., the stacked vertical cell, with precise control of Joule heating and potentially more stable intermediate resistance levels. For an electrode area of 10 nm × 20 nm, a low programming current of 60-90 μA generates sufficient heating power to amorphize the phase-change elements sequentially, resulting in four distinct resistance levels distributed over a two-order-of-magnitude resistance range with promise for multibit storage.
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