Electrostatic Clamping Applied to Semiconductor Plasma Processing: I . Theoretical Modeling

Abstract

Semiconductor plasma processing has become an indispensable step in the manufacture of very large scale integrated circuits. This technique is however often limited by the damaging heating of a wafer loosely lying on the susceptor, that may occur even if the susceptor is well cooled. To overcome this problem, most industrial systems use mechanical clamping of the wafer against the susceptor with an extra gas back‐side pressure. Another way to cool the wafer is based on the use of electrostatic forces. This method, known as electrostatic clamping, has not yet found a wide application field nor has it been thoroughly studied though it has several inherent interesting features. The aim of this paper is to describe the theoretical bases for electrostatic clamping as applied to a microelectronics plasma reactor and to investigate the ultimate performance that this system can achieve without inducing electrical problems. A particular emphasis is placed on electrical phenomena generated by high voltage in the process chamber which can lead to severe damage if no precautions are taken.