Electronically tunable CMOS class-AB output stage

Abstract

A new technique for CMOS class-AB output stages is introduced in this Letter. The technique uses a master---slave configuration of a complementary common-source output stage. It offers the advantage that the quiescent and minimum currents of the output stage can be independently tuned. The effectiveness of the proposed technique was verified by simulations using a standard n-well 0.18 μm CMOS process with 1 V supply voltage. A voltage buffer, that includes the proposed output stage, is able to drive a capacitive load of 0.5 nF obtaining ?63 dB total harmonic distortion. The topology features also power efficiency of about 63% for a pure resistive output load equal to 50 ?.