Abstract
Sustaining Moore's law requires the design of new materials and the construction of FET. Herein, we investigated theoretically the electronic transport properties of PbSi nanowire Schottky-clamped transistors with a surrounding metal–insulator gate by employing MD simulations and the NEGF method within the extended Hückel frame. The conductance of PbSi nanowire transistors shows ballistic and symmetrical features because of the Schottky contact and the resonance transmission peak, which is gate-controlled. Interestingly, the PbSi(8,17) nanowire FET shows a high ON/OFF ratio and proves to be a typical Schottky contact between atoms as described by the EDD and EDP metrics.
Highlights
The reduction in dimensions of electronic devices and the introduction of additional performance boosters such as metal gate electrodes and high-k gate dielectrics have proved to be a remarkable roadmap for improving transistor performance in the last decade.2–4 In addition, the integrated circuit (IC) industry has taken advantage of low-dimensional materials to manufacture gate-control transistors
It is evident that all PbSi nanowires have structures similar to that of pure Si nanowires as they were obtained from the same CNT
The 3D cut plane geometries are represented in a cool-map, which shows that there is a high potential for charge carriers at the Pb–Si interface and a barrier for Si, once again indicating that there is more covalent bonding for Si atoms than Pb atoms
Summary
The reduction in dimensions of electronic devices and the introduction of additional performance boosters such as metal gate electrodes and high-k gate dielectrics have proved to be a remarkable roadmap for improving transistor performance in the last decade. In addition, the integrated circuit (IC) industry has taken advantage of low-dimensional materials to manufacture gate-control transistors. The reduction in dimensions of electronic devices and the introduction of additional performance boosters such as metal gate electrodes and high-k gate dielectrics have proved to be a remarkable roadmap for improving transistor performance in the last decade.. The technology for trigate transistors in low dimensions has undergone huge developments, reducing device size and diminishing device dimensions remain a challenge for current technology worldwide. Nanowires, which are one-dimensional materials, have gained tremendous interest as novel materials for nextgeneration electronic devices because they successfully address the formidable challenges of transistor scaling. Rim et al. fabricated phosphorus-doped silicon nanowire eld-effect transistor biosensors using conventional CMOS techniques; their low frequency characteristics are measured by the noise equivalent gate voltage uctuation and exhibit drastically enhanced performance. Zheng et al. successfully produced n-type silicon nanowires (SiNWs) via a controlled phosphorus dopant technique for the rst time and prepared high-performance n-type FETs from these
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