Electronic states at SiSiO 2 interface introduced by implantation of Si in thermal SiO 2

Abstract

Interface traps due to excess Si introduced into the SiSiO 2 system by ion implantation are investigated. Implanted oxides are shown to have interface traps at or slightly above the Si conduction band edge with densities proportional to the density of off-stoichiometric Si at the SiSiO 2 interface. Diluted oxygen annealing is shown to result in physical separation of interface traps and equilibrium substrate electrons, demonstrating that “interface” states are located within a 0.5 nm thick layer of SiO 2. Possible charge trapping mechanisms are discussed and the effect of these traps on MOS transistor characteristics is described using a sheet charge model.