Abstract
High-performance electronics would greatly benefit from a versatile III-V integration process on silicon. Unfortunately, integration using hetero epitaxy is hampered by polarity, lattice, and thermal expansion mismatch. This work proposes an alternative concept of III-V integration combining advantages of pulse electrodeposition, template-assisted selective epitaxy, and recrystallization from a melt. Efficient electrodeposition of nano-crystalline and stochiometric InSb in planar templates on Si (001) is achieved. The InSb deposits are analysed by high resolution scanning transmission electron microscopy (HR-STEM) and energy-dispersive X-ray spectroscopy (EDX) before and after melting and recrystallization. The results show that InSb can crystallise epitaxially on Si with the formation of stacking faults. Furthermore, X-ray photoelectron (XPS) and Auger electron (AE) spectroscopy analysis indicate that the InSb crystal size is limited by the impurity concentration resulting from the electrodeposition process.
Highlights
One of the fastest-growing industries is electronic devices manufacturing based on silicon technology
The deposition process is very selective, and the InSb is deposited with high uniformity in each quarter
We have proposed and demonstrated the use of electrodeposition as an alternative approach for monolithic integration of a compound semiconductor on silicon
Summary
One of the fastest-growing industries is electronic devices manufacturing based on silicon technology. With an increasing demand for faster, smaller, and better-performing devices, growth CAGR (compound annual growth rate) of 4.6% from 2020 to 2027 for this field is expected Recently both academia and industry have focused efforts on the search for alternative technologies for which performance in the long run could considerably surpass that of Si (Ramirez et al, 2020), especially in more futuristic applications like quantum computing. These include III-V semiconductors for sensing and high-speed electronics where high value is created (Riel, 2017). Both economic and technological difficulties, like crystal lattice and polarity mismatch, have prevented the integration of foreign materials directly on a silicon platform
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