Abstract
Amorphous oxide-based thin-film logic circuits have been fabricated using only an n-type amorphous silicon–zinc–tin–oxide (a-SZTO) channel layer with different source/drain electrodes. Enhancement-mode thin-film transistors (TFTs) were fabricated with oxide electrodes. Depletion-mode TFTs were fabricated with metal electrode. Work functions were measured by Kelvin probemicroscopy. The barrier heights ( $\Phi _{\textsf {B}}$ ) between the a-SZTO channel layer and the electrode were measured to be 1.831, 2.341, and 2.339 eV for the Ti/Al electrode, Indium–silicon–oxide (ISO) electrode, and indium–tin–oxide (ITO) electrode, respectively. The physicalmechanism on the variation of sheet and contact resistances was investigated using a transmission line method, and the change in the resistances is closely related to $\Phi _{\textsf {B}}$ . Inverters were fabricated, with different $V_{\textsf {TH}}$ values adopted simply by using different contact characteristics between various electrodes and the semiconductor channel. High values of voltage gains in inverters were obtained: 12.33 (ISO) and 11.75 (ITO) at $V_{\textsf {DD}}= 5$ V. Itwas also confirmed that more complicated n-type-based NAND and NOR thin-film circuits, implementedwith different electrodes, functioned as conventional logic circuits. This simple fabrication method of thin-film logic circuits opens the possibility of implementing next-generation stacked integrated circuit technology.
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