Electrocardiogram (ECG/EKG) using FPGA

Abstract

FPGAs (Field Programmable Gate Arrays) are finding wide acceptance in medical systems for their ability for rapid prototyping of a concept that requires hardware/software co-design, for performing custom processing in parallel at high data rates and be programmed in the field after manufacturing. Based on the market demand, the FPGA design can be changed and no new hardware needs to be purchased as was the case with ASICs (Application Specific Integrated Circuit) and CPLDs (Complex Programmable Logic Device). Medical companies can now move over to FPGAs saving cost and delivering highly-efficient upgradable systems. ECG (Electrocardiogram) is considered to be a must have feature for a medical diagnostic imaging system. This project attempts at implementing ECG heart-rate computation in an FPGA. This project gave me exposure to hardware engineering, learning about the low level chips like Atmel UC3A3256 micro-controller on an Atmel EVK1105 board which is used as a simulator for generating the ECG signal, the operational amplifiers for amplifying and level-shifting the ECG signal, the A/D converter chip for analog to digital conversion of the ECG signal, the internal workings of FPGA, how different hardware components communicate with each other on the system and finally some signal processing to calculate the heart rate value from the ECG signal. ACKNOWLEDGEMENTS I am very grateful to my advisor Dr. Robert Chun for guiding me through this project. His constant support and patience was vital to the completion of this project. I thank him for believing in me and encouraging me throughout the course of this project. I am grateful to Mr. Dan Need for sharing his expertise on FPGA and helping me take the right decisions. I thank him for taking the time to answer my questions clearly and with patience during the design phase of the project. I appreciate the help I received from Mr. Tarak Shah in overcoming all the technical challenges I faced while working on this project. His knowledge on FPGA systems and their implementation is exceptional. Finally, I would like to sincerely thank my committee member Dr. Jon Pearce for his support. I am also thankful to my friends and family especially Ms. Namrata Bapat who stood by me throughout this entire journey here at San Jose State University. Thank you. Vaibhav Desai