Abstract

Parylene, high-purity and pinhole-free polymeric films were assessed to determine the feasibility of employing this coating as either a replacement or an adjunct to inorganic passivation layers or as a barrier coating capable of maintaining the semiconductor surface free of moisture, ions, and other contaminants. To study the effects of temperature and electrical stress on semiconductor devices coated with various Parylenes, the Rel-chip which enbles the determination of immediate and magnified changes in critical electrical device parameters for MOS and IC devices. Three groups containing unlidded devices were coated with three different Parylenes,i.e., Parylene C, D, and N, while the “lidded” devices were to function as controls. After coating with Parylene, all the devices underwent electrical/temperature stressing to evaluate the stability of Parylene coatings on the “Rel-Chip” based on measurement of leakage currents and threshold voltages. The groups of devices received initial measurements onVGST, IDSS, ISDS, BVDSS, andBVSDS and were subdivided for three types of electrical stress. The results indicated that changes in the electrical parameters were negligible on most of the Parylene coated devices after they were subjected to the various stress conditions. The average threshold voltage shifted less than 0.1, the breakdown voltage changed less than 1 v and the leakage currents drifted within a few picoamperes for all groups.

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