Electrical Properties of 3C-SiC Layers Grown on Silicon Substrates with a Novel Stress Relaxation Structure

Abstract

Silicon (Si) substrates having cavities just beneath the surface layer (multicavity Si substrates) were examined as the stress relaxation structure in 3C-SiC heteroepitaxial growth on Si substrates. Single-crystalline 3C-SiC layers were grown on both the multicavity Si substrates and conventional ones by means of low pressure chemical vapor deposition. The layers’ quality was characterized by cross-sectional transmission electron microscope (TEM) observations, micro-Raman spectroscopy, current-voltage characteristics, and capacitance-voltage (C-V) characteristics. The TEM results showed that this structure reduced the defect density in the 3C-SiC layers. The averaged full width at half-maximum of TO Raman band in the 3C-SiC layers on the multicavity Si substrates was narrower than that on the conventional ones. Furthermore, the characteristics of the Schottky barrier structures showed that the reverse leakage current of the diodes using the multicavity Si substrates was lower than that using the conventional ones. The depth profile of the carrier concentration in the 3C-SiC layers determined by the C-V characteristics implied the improvement of the crystal quality of the 3C-SiC layers grown on the multicavity substrates. These results indicate that the multicavity Si substrates are effective for stress relaxation in the 3C-SiC layers. © 2001 The Electrochemical Society. All rights reserved.