Electrical Investigation of Si/SiGe Layers Grown on a Nanometer-Thick SOI by CVD

Abstract

The performance of devices formed by chemical vapor deposition (CVD) on the nanometer silicon-on-insulator (SOI) of a SIMOX wafer may possibly be influenced by the crystalline quality of the SOI surface layer, because there are many defects in the interface region of the SOI on the buried oxide. We grew Si/SiGe/Si layers on SOI, 7, 21, and 283 nm thick, and fabricated p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) on the layers. The crystalline quality evaluation for the layers was done through I-V characteristics. The drain current decreased as the SOI thickness decreased. The effective hole mobility for the device with the thinnest SOI was nearly 15% lower than those for the other devices. We showed that the thinnest SOI was affected by the defects in the SOI and SOls thicker than 21 nm were not influenced by the defects because the crystalline quality of the surface layers grown on SOI was promoted.