Electrical characterization of SiO2/n-GaN metal–insulator–semiconductor diodes

Abstract

We have investigated the interface properties of SiO2/n-GaN metal–insulator–semiconductor (MIS) diodes by using capacitance–voltage (C–V) and capacitance transient techniques. The MIS diodes were fabricated by SiO2 sputtering onto an n-GaN epitaxial layer grown by atmospheric pressure metalorganic chemical-vapor deposition on a sapphire substrate. C–V characteristics show a total interface trap density of ∼2.2×1012 eV−1 cm−2 and display capacitance saturation in deep depletion (>15 V). The capacitance in deep depletion is found to significantly increase by incident white light. A capacitance transient is also seen after applying reverse voltages, reflecting thermal emission of carriers from the SiO2/GaN interface. Deep-level transient spectroscopic measurements reveal a dominant interface trap with an activation energy of ∼0.77 eV from the conduction band, corresponding to the capacitance transient. Therefore, this interface trap is considered to induce surface Fermi-level pinning, which results in the capacitance saturation in the measured C–V characteristics.