Electrical Characterization of Silicon-on-Insulator Wafers Using Photo-Conductance Decay (PCD) Method

Abstract

In this work the photo-conductance decay (PCD) technique is used to measure the effective carrier lifetime in 160 nm–180 nm thick active layers of silicon-on-insulator (SOI) substrates both SIMOX and bonded. Study was carried out using 405 nm excitation wavelength featuring 200 nm absorption depth in silicon which was selected to coincide with the thickness of the active layers in the SOI wafers studied. The results obtained indicate the effectiveness of PCD methodology adopted for this study in the measurements of the minority carrier lifetime in Si active layers in SOI substrates. They demonstrate differences between PCD characterization of bulk and SOI wafers which are related to the confinement of the depletion region within the Si active layer in the latter case making its electrical properties less sensitive to the variation of the surface chemical condition. On the other hand, the process related physical changes in the SOI surface morphology were readily detectable by PCD measurements. Furthermore, the specific outcome of this investigation is the result indicating higher minority carrier lifetime in the Si active layer of bonded SOI wafers as compared to SIMOX wafers used in this study.