Electrical characteristics of polycrystalline Si layers embedded into high- k Al 2O 3 gate layers

Abstract

The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high- k Al 2O 3 (alumina) gate layers are investigated in this work. The capacitance versus voltage ( C– V) curves obtained from the metal–alumina–polysilicon–alumina–silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C– V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al 2O 3 layers in the MASAS capacitor. Also, current versus voltage ( I– V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I– V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.