Abstract
Electrical and reliability characteristics of metal-oxide-semiconductor (MOS) capacitors with various-Ti-concentration-doped HfLaTiO/interfacial layer (IL)/P-Si(100) stacked structures are presented. Charge carrier generation/trapping and the related mechanisms of a thin HfLaTiO/IL stack in n-type MOS capacitors have been investigated under constant gate voltage stress. The mechanisms related to larger positive charge generation in the HfLaTiO gate dielectric bulk can be attributed to Ti-doped HfLaTiO dielectric. This is confirmed from the density of stress-induced oxide trapped charges. Moreover, more positive charges are induced in the HfLaTiO dielectric with increasing postdeposition annealing temperature. By developing proper Ti concentration in HfLaTiO dielectrics, the enhanced equivalent oxide thickness (EOT = ~ 0.5 nm) and the interface trap density ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ) were demonstrated. Furthermore, the Ti-doped HfLaTiO dielectric is helpful for enhanced <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> -value of the HfLaTiO film (lower EOT), but the optical bandgap properties could be degraded. Energy band diagram of MOS capacitor with an HfLaTiO dielectric was achieved by the measurement of the effective work function of Ta metal gate deposited on HfLaTiO dielectric, the optical bandgaps of HfLaTiO dielectric, and Schottky barrier height (Φ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</i> ) at the Ta/HfLaTiO interface.
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More From: IEEE Transactions on Device and Materials Reliability
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