Electrical and optical characterization of gas source and solid source MBE low temperature buffers

Abstract

MBE GaAs buffer layers grown at low substrate temperatures (200–300°C) have been shown to significantly reduce backgating and sidegating in GaAs integrated circuits. The isolation provided by these buffers is attributed to a high level of compensating traps in the layers induced by excess arsenic and arsenic antisite defects. Structures were grown by both gas source and solid source MBE in a VG Semicon V80H dual chamber system. The structures allow us to study characteristics of the LTB itself as well as the quality of active layers grown upon these buffer layers. The insulating characteristics of the gas and solid source LTBs are comparable. However, in contrast to control layers grown on semi-insulating GaAs, we observe considerably higher trap concentrations in FET active layers grown on LTBs. Deep level transient spectroscopy (DLTS) measurements show several resolvable electron and hole traps, plus a band of shallow hole traps. Due to the differences in growth kinetics for gas and solid source growth such a close similarity was not expected. The resistivity of the LTBs and the traps incorporated into the active layers appear to be similar for solid source (As 4) and gas source (As 2) growth. Furthermore, the characteristics of proximity annealed layers continue to change for varied length low temperature anneals. This indicates that the excess arsenic continues to diffuse into the active device layers degrading device stability.