Efficient testing of simulation V&V for closed-loop operations

Abstract

An essential element of simulation verification and validation (V&V) involves thorough testing of all required functional and physical interfaces to the units under test (UUT). Charles Stark Draper Laboratory (CSDL) has developed and applied an efficient methodology to test simulations which involves automatically generating test software, scripts, and procedures by extracting information directly from system design tools. This process ensures consistency between the simulation interfaces and the UUT, and expedites the test and verification of those interfaces, which in turn allows the simulation to be updated and delivered to users more quickly. This paper describes the application of this process to the simulation of a manned space vehicle. The vehicle simulation is used to test and integrate avionics and software as they evolve throughout the entire program life cycle. The design of the simulation must therefore also evolve in parallel with the software and avionics architecture and interfaces. The simulation supports other vehicle development and training operations, which impose additional interface requirements. In order to provide these capabilities, the simulation must support many types of interfaces, and it must operate in several operating modes. The operating modes of the simulation include: Software-in-the-Loop (SIL), Processor-in-the-Loop (PIL), and Hardware-in-the-Loop (HIL). Given the range of operational modes and interfaces involved, and the required flexibility of the simulation system, it is desired to design the test procedures in a similar manner. The tests must be able to verify the system-level requirement on the simulation to conform to the vehicle signal interface control document (ICD). With a CSDL-developed module, embedded queries are inserted into scripts used to generate test files, test data, and analysis scripts for the testing process. Each of three modes described above (SIL, PIL, and HIL) are tested. The primary driver for design of the testing process is automation. It is desired to minimize the manpower needed for the performance of the test procedure. By taking advantage of the vehicle signal database, SIL and PIL testing and verification are nearly entirely push-button endeavors from generation of the version-dependent test files for commercial-off-the-shelf (COTS) testing tools through validation of the data exchanged over the interface. Verification of the design of the HIL test with respect to the required electrical characteristics and data formatting is done utilizing a combination of COTS hardware and software design programs. CSDL utilizes a COTS modular platform to host an internal embedded computer along with multiple input/output boards to emulate the HIL interfaces. This modularity enables the team to quickly respond to altered interfaces or data specifications. The user interface portion allows the user to easily identify and manipulate signals sent to the simulation and real-time verification of those received.