Abstract

It is very important to detect and correct faults for ensuring the validity and reliability of these circuits. In this regard, a comparative study with related existing techniques is undertaken. Two techniques to achieve the testability of reversible circuits are introduced that have been improved in terms of quantum cost and fault coverage rate. Considering this aspect, the main focus of these techniques is on the efficient detection and location of faults with 100% accuracy. These techniques for fault detection in reversible circuit design, in addition to being able to produce the correct outputs, can also provide information for fault location that has already been done at a higher cost. Proposed approaches have been successfully tested for all types of SMGF, MMGF, PMGF, RGF, and SBF. In order to verify the functional correctness of the proposed scheme, it also has executed the testing over a reversible full adder circuit, and findings are checked. In the following, the proposed approach of reversible sequential circuits is presented for the first time so far. The cost metrics are evaluated for all the proposed designs and compared the estimated results against some existing design approaches of reversible circuits for better understanding.

Highlights

  • Power dissipation and therewith heat generation is a serious problem for today’s computer chips

  • This paper presents approaches for identifying all fault models in reversible circuits to neutralize the effect of the faults in the circuit

  • The proposed online testing approach is well-suited for fault detection and location in a reversible sequential circuit, which is presented for the first time in the literature

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Summary

Introduction

Power dissipation and therewith heat generation is a serious problem for today’s computer chips. Fault detection and fault location are two important techniques in the testing of these circuits, which are realized with redundancy. To achieve a near-optimal solution, a review of fault models, test approaches, and cost metrics have been collected from the literature This is done by providing low-cost and straightforward designs to derive in terms of the quantum costs and fault coverage rate compared to existing designs. This paper presents approaches for identifying all fault models in reversible circuits to neutralize the effect of the faults in the circuit. It generates the correct output, as well as identifies the location of faults. A fault detection approach is presented for reversible sequential circuits.

Background
Reversible circuits
Quantum circuits
Cost metrics in reversible circuits
Quantum cost
Ancilla input
Garbage output
Qubit cost
T-depth
Offline test
Online test
Fault tolerance and fault models
Single missing gate fault model
Multiple missing gate fault model
Cross-point fault model
Bit fault model
Limitation
Related works
Proposal works
Fault location in single missing gate fault
Fault location in multiple missing gate fault
Fault location in partial missing gate fault
Fault location in single-bit fault
The proposed LUT-based automatic of fault correction in reversible circuits
Comparisons
design
Findings
Conclusion and future work
Full Text
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