Efficient structures for fault-tolerant majority gate in quantum-dot cellular automata

Abstract

Quantum-dot cellular automata (QCA) technology is a proper alternative to CMOS circuits, which is a Nano-scale technology that is capable of designing and implementing logic circuits via high efficiency and low power. In this regard, one of the major challenges to design the circuit at QCA is the loss, addition, cells, rotation, and displacement of the cells. Some solutions have been provided to handle these challenges. In this paper, three new structures are proposed to increase the fault tolerance in the three-input majority gate. QCA Designer implements the proposed structures. The simulation results show an increase in fault tolerance and an improvement in the number of cells and space requirements.