Efficient Strategies of Compressing Three-Dimensional Sparse Arrays Based on Intel XEON and Intel XEON Phi Environments

Abstract

Array operations are useful in a lot of important scientific codes, such as molecular dynamics, finite-element methods, atmosphere and ocean sciences, and etc. In recent years, more and more applications, such as geological analysis and medical images processing, are solved and processed by using array operations for three-dimensional (abbreviate to 3D) sparse arrays. Due to the huge computation time, it is necessary to compress the sparse arrays to compact structures in order to avoid unnecessary computations. Parallel processing is also a suitable solution to speed up the array operations based on multiprocessors, multicomputers and accelerators. How to compress the sparse arrays efficiently is the first task of designing parallel algorithms for practical applications with sparse array operations. Hence, efficient strategies of compressing 3D sparse arrays based on Intel XEON (multiprocessor) and Intel XEON Phi (accelerator) environments are proposed in this paper. For each environment, two strategies, inter-task parallelization and intra-task parallelization, are presented to compress a series of sparse arrays and single large sparse array, respectively. From experimental results, the inter-task parallelization strategy achieves 16x and 18x speedup ratios based on Intel XEON E5-2670 v2 and Intel Xeon Phi SE10X, respectively, 4x and 5x speedup ratios, respectively, for the intra-task parallelization strategy.