Efficient power map modeling in integrated circuits and power devices

Abstract

In the following paper, a flip-chip package structure (Silicon die) is modeled using electronics cooling solver ESI Presto. Two numerical approaches are used to model large number of power sources referred to as “Power Map”. First approach is to model sources as rectangular patches on a surface. This approach requires geometry re-meshing. Second approach is to model sources as points which eliminates the need to re-mesh. Hence, large number of sources can be modeled without increases the grid count or simulation execution time. Results from these two approaches are compared and they match very well for the current mesh. A parameter sensitivity analysis is performed by varying power map parameters such as power amplitude, Gaussian pulse width and location on the die. The relation between input power and average temperature rise is linear in these simulations as expected. The point source method is used to demonstrate a case with very large number (10,000) of sources.