Abstract
Abstract. This article adresses the model reduction of IC conducted emission models. A method to efficiently deal with the high number of independent sources in IC conducted emission models, which are a strong limitation for model order reduction, is presented. A network alteration is proposed, which allows for a much higher model reduction than standard approaches. The system of the altered network can be more efficiently reduced with standard model order reduction algorithms in order to speed up frequency-simulations. Synthesising the reduced system into a passive electrical network enables fast time-simulations to be made with circuit simulators. The whole procedure is validated by reducing an example of an IC conducted emission model of an 32 Bit microcontroller.
Highlights
With decreasing size of device structures additional effects have to be considered early in the design process (Hellebrandt et al, 2007; John, 2004)
For model order reduction (MOR) the electrical network of the IC conducted emission model has to be described with the help of the modified nodal analysis as a system of differential algebraic equations, in the form ofx = Bu, y = LT x
Since the high number of ports is a strong limitation for model order reduction (Silva et al, 2007; Silva and Silveira, 2007; Feldmann, 2004), we present a passive network description of the model with a reduced number of ports
Summary
With decreasing size of device structures additional effects have to be considered early in the design process (Hellebrandt et al, 2007; John, 2004). Electrical models for IC conducted emission are created to help semiconductor manufacturers to take on-chip EMC effects into account during the design process. In this article an efficient network description of the IC conducted emission model, which enables a high order reduction, is introduced. The IC conducted emission model is introduced in Sect. 2. The description of the model as a system of circuit equations is exhibited in Sect. 3. The standard as well as the proposed network description of the model are shown in Sect. A reduced model is created by synthesising the order reduced system into an electrical network as described in Sect. 6. The validity of the proposed model reduction is shown with an example in Sect.
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