Efficient Matchline Controller for Hybrid Content Addressable Memory

Abstract

Low-energy dissipation as well as high-speed matching are two goals in the design of content addressable memories (CAMs). An efficient matchline (ML) controller is proposed in this work to achieve a low-power hybrid CAM while maintaining acceptable performance for search. This is applied in the implementation of 128×32-bit CAM using 45-nm CMOS technology. Short and fast discharged ML path of the proposed controller makes it possible for the CAM to provide 58.56% and 13.11% improvement in search-speed over a conventional NAND-based CAM and a hybrid-type CAM, respectively. The result of shorter NAND-ML controlling the longer NOR-ML is able to suppress not only mismatched but also partial matched NOR- MLs, so that power is saved during search operation. While the average-power consumption is only 3.93 µW, lesser by 30.69 % than the low-power NAND-CAM, the 32-bit word produces ML state in 3.58 ns search time leading to the improvement in energy-delay by 1.21, 2.16 and 4.95 times from the existed hybrid-type, NOR-ML and NAND-ML CAMs, respectively. Energy metric of proposed design, obtained as 0.17 fJ/bit/search under 1 V supply, is the least among the compared designs.