Efficient Mapping of Applications on Cache Based Multiprocessors

Abstract

Cache coherent multiprocessors have become popular in recent times because they reduce the memory latency. It is important to accurately estimate the intertask communication time in order to efficiently map the program tasks onto the processors. Computing the communication requirements from program characteristics in the presence of cache coherence protocols is difficult. In this paper we present a technique to compute the communication times of programs on cache coherent distributed shared memory systems. Simulated annealing is used to obtain near optimal mappings of program tasks onto processors. The techniques are demonstrated using a Sequent Balance multiprocessor and the Jacobi iteration problem. The estimated communication costs agree with the measured values within 15%. It is also shown that taking the effects of cache coherence into account results in more efficient mapping of applications.