Efficient interconnect design with novel repeater insertion for low power applications

Abstract

Length of interconnect and number of repeaters are increasing with the advancement in VLSI Technology. Requirement of repeaters is increasing as the length of interconnect is increasing. The power delay product and frequency of operation plays significant role in designing of repeater. Performance of earlier conventional repeater with the proposed sub-threshold grounded body (STGB) bias repeater for various lengths of interconnects is analyzed. The simulation results shown in the paper indicates that the STGB bias repeater circuit operates in medium frequency range with better power-delay product as compared with the previous repeater. The temperature sustainability and performance with the variation of aspect ratio is also better for STGB bias repeater. Reduction of overall delay, power dissipation as well as operation of the repeater at higher frequencies can lead to the better performance of the VLSI chip in sub-threshold region.