Efficient Implementation Technique for OFDM on FPGA

Abstract

Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier system where data bits are encoded to multiple sub-carriers, while being sent simultaneously. The basic idea of OFDM is to divide the available spectrum in a number of narrowband and low-rate orthogonal subcarriers, to prevent interference between the closely carriers. This makes the OFDM system resistant to multipath effect. Due to wide use of OFDM, it is essential to develop a Digital Signal Processor (DSP) to generate OFDM signals present in the various standards, using a reconfigurable platform like Field Programmable Gate Array (FPGA). The objective of the project is to design and implement OFDM transmitter and receiver on FPGA hardware. This project concentrates on developing custom single purpose processor for OFDM with Fast Fourier Transform i.e., FFT and Inverse Fast Fourier Transform i.e., IFFT in an efficient way. The work also includes design of a mapping module (Modulator)(64-QAM), serial to parallel, parallel to serial converter and Vedic multiplier modules and interconnections between them.Basically we are integrating different proposed ideas into a single paper. The design uses 64-point FFT and IFFT for the processing module, which indicate that the processing block contain 64 inputs data. This design is simulated on Zynq UltraScale+ FPGA Board(Part:xczu7ev-ffvf1517-1LV-i) and tested and verified using Xilinx Vivado 2020 software. Simulations on Python is also done to compare our result with the results obtained from that of use of FPGA.