Efficient hardware implementation of security processing for IEEE 802.15.4 wireless networks

Abstract

The IEEE 802.15.4 standard defines the medium access control and physical layer for low-rate, low-power wireless personal area networks (WPAN). As a number of WPAN applications require protected communications, the standard defines security procedures. Since the procedures typically consume most processing capacity in the limited 802.15.4 devices, efficient implementations are needed. As a solution, this paper presents a compact and energy-efficient hardware design, supporting all the security suites of the standard. Compared to typical WPAN processors, the presented FPGA prototype and the estimated ASIC implementation offer significantly higher performance and lower energy consumption. The FPGA throughput at the highest security level is 90 Mb/s and the energy consumption is 1/190 of an 8-bit microcontroller and 1/5 of an ARM9. The estimated energy consumption for the equivalent ASIC implementation is 1/10 of the FPGA prototype. In addition to 802.15.4, the hardware design supports all wireless technologies derived from the IEEE 802.11i security specification.