Efficient Hardware Implementation of DNN-Based Speech Enhancement Algorithm With Precise Sigmoid Activation Function

Abstract

This brief presents the hardware implementation of deep neural network-based speech enhancement algorithm (DNN-SEA) with a precise sigmoid activation function. Further, an adaptive step-size-based slope and intercept method (AS-SIM) has been developed to approximate the sigmoid function that uses the maximum allowable error <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$(\epsilon)$ </tex-math></inline-formula> as an input parameter. The performance of the DNN-SEA is measured in terms of speech quality and intelligibility using a perceptual evaluation of speech quality (PESQ) and short-time objective intelligibility (STOI) parameters, respectively. Hardware implementation is performed by Synopsys Design Compiler with a TSMC 90-nm library. The performance comparison has been conducted in terms of area, gate count, delay, and power consumption. Results confirm that the proposed AS-SIM approximation improves performance in terms of PESQ and STOI value and significantly reduces the area requirement and power consumption.