Abstract
An analytical criterion for the optimization of the small-signal settling time in three-stage amplifiers is carried out. The criterion is based on making equal the two exponential decays of the step response. Including slew-rate effects, a useful design strategy for the design of three-stage operational transconductance amplifier is provided. Extensive time-domain simulations on a transistor-level design in a 65-nm CMOS process confirm the validity of the proposed approach.
Highlights
Among the various analog and mixed-signal integrated circuits, the operational transconductance amplifier (OTA) is certainly one of the most fundamental building blocks
We provide an analytical design criterion for optimizing the small-signal settling time of a three-stage amplifier, based on making equal the two exponential decays of the step response
The proposed strategy is used to design a three-stage OTA from settling-time specifications
Summary
Among the various analog and mixed-signal integrated circuits, the operational transconductance amplifier (OTA) is certainly one of the most fundamental building blocks. In [28], the authors developed an interesting and general approach for the design of three-stage OTAs from settling-time requirements including SR effects. We provide an analytical design criterion for optimizing the small-signal settling time of a three-stage amplifier, based on making equal the two exponential decays of the step response. This allows the designer to deal with a well-defined strategy avoiding the generation of contour plots and the design through graphical methods. Extensive time-domain simulations confirm the validity of the proposed design strategy
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