Abstract

Quantum-dot Cellular Automata (QCA) based reversible logic is the utmost necessity to achieve an architecture at nano-scale, which promises extremely low power consumption with high device density and faster computation. This paper emphasises on the design of an efficient reversible Arithmetic Logical Unit (ALU) block in QCA technology. We have considered [Formula: see text] RUG (Reversible Universal Gate) as the basic unit, and also report a HDLQ model for RUG with 52.2% fault tolerance capability. Further, the reversible ALU has synthesized with reversible logic unit (RLU) and reversible arithmetic unit (RAU). We also demonstrate QCA implementation of RLU and RAU with lesser complexity and cell counts. The proposed ALU needs only 64 MVs (Majority Voters), which demonstrates 40% optimizations in the majority gate counts than the existing result. QCADesigner-2.0.3 is used to verify the proposed designs.

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