Efficient design of QCA based hybrid multiplier using clock zone based crossover

Abstract

Quantum-dot cellular automata (QCA) is an emerging trend in nanotechnology and appropriate for the development of high performance and low power integrated circuit design. Dadda and Wallace tree multipliers are designed by employing CZBCO technique to overcome the crossover issues of geometric design complexity and alignment accuracy and also to achieve high device density. The proposed design of QCA-based Hybrid parallel multiplier consists of decomposing structure that adopts Dadda and Wallace algorithms to optimize the design. In this proposal, N-bit multiplier array is decomposed into four N/2-bit multiplier arrays that are easily constructed by employing both Wallace and Dadda multipliers. The Hybrid multiplier comprising dadda and Wallace tree multiplier uses less number of majority gates and inverters and hence minimizes area, cell count and delay. It has been observed that the QCA cost function of the proposed multiplier better than existing multiplier referred in the literature in terms of energy and speed. Furthermore, the proposed multiplier significantly achieves high device density, lessened clock delay, area and cell count and also to eliminate fabrication difficulty of crossover.