Efficient coding and error monitoring for spacecraft digital memory

Abstract

The efficient implementation of a byte-wide single error-correcting and double-error detecting (255,252) cyclic Reed-Solomon block code is described. A common procedure is used for both encoding and decoding, which is analogous to an arithmetic check-sum. If executed in software, the structure is conceptually simple and lends itself to easy tutorial presentation, which is given here. The all-software version has been applied in practice, and proved to work, for the monitoring and control of the single event upsets which occur in the RAM discs of satellite memories. There may be more conventional terrestrial applications. The same proposal supports a system which combines discrete logic with software, for maximum speed. Also in any implementation, there is a ready extension to a (256,252) code, which can then correct double byte errors.