Efficient clustering and simulated annealing approach for circuit partitioning

Abstract

Circuit net list bipartitioning using simulated annealing technique has been proposed in the paper. The method converges asymptotically and probabilistically to global optimization. The circuit net list is partitioned into two partitions such that the number of interconnections between the partitions is minimized. The proposed method begins with an innovative clustering technique to obtain a good initial solution. Results obtained show the versatility of the proposed method in solving non polynomial hard problems of circuit net list partitioning and show an improvement over those available in literature.