Efficient Bit-Parallel Multiplier for All Trinomials Based on n-Term Karatsuba Algorithm

Sun-Mi Park,Ku-Young Chang,Dowon Hong,Changho Seo

doi:10.1109/access.2020.3023804

Abstract

Recently, hybrid multiplication schemes over the binary extension field GF(2m) based on nterm Karatsuba algorithm (KA) have been proposed for irreducible trinomials. Their complexities depend on a decomposition of m and the choice of a generation polynomial. However, these multipliers have some limitations on a decomposition of m or generation polynomial x m + x k + 1 such that m ≥ 2k. In this paper, we loosen such limited conditions. We present a new hybrid bit-parallel multiplier based on n-term KA for any irreducible trinomial x m + x k + 1 (0 k m), where m is decomposed as m = nm 0 + r with 0 r m0 and 1 n. (Here, various values for n, m 0 and r may be chosen.) To this end, we generalize the previously proposed multiplication scheme for x nm0+1 +x k +1 into x nm0+r +x k +1. We evaluate the explicit complexity of the proposed multiplier. Specific comparisons show that the proposed multiplier achieves the lowest space complexity with the same or lower time complexity among hybrid multipliers. Compared to the fastest multipliers, the time complexity of the proposed multiplier costs only TX higher while its space complexity is much lower (it has roughly 40% reduced space complexity), where TX is the delay of one 2-input XOR gate.

Highlights

Efficient hardware implementations of the binary extension field GF(2m) arithmetic are desired for various areas such as elliptic curve cryptography, computer algebra, and error correcting code ([1]–[3])
Park et al.: Efficient Bit-Parallel Multiplier for All Trinomials Based on n-Term Karatsuba Algorithm approach combining the above two steps to reduce time complexity
We present a hybrid multiplier for any irreducible trinomial xm + xk + 1 (0 < k < m) with a decomposition m = nm0 + r with 0 < r < m0 and 1 < n. (Since the case r = 0 is already dealt with in [18, Section III], we do not address the case.) To this end, we generalize the multiplication scheme for trinomial xnm0+1 + xk + 1 in [18] into xnm0+r + xk + 1, which combines n-term Karatsuba algorithm (KA) and Mastrovito approach

Summary

INTRODUCTION

Efficient hardware implementations of the binary extension field GF(2m) arithmetic are desired for various areas such as elliptic curve cryptography, computer algebra, and error correcting code ([1]–[3]). Implementing the multiplier, which is expressed in terms of TX (the delay of an XOR gate) and TA (the delay of an AND gate) Such complexities mainly depend on the choice of field basis and a generation polynomial. Park et al.: Efficient Bit-Parallel Multiplier for All Trinomials Based on n-Term Karatsuba Algorithm approach combining the above two steps to reduce time complexity. KA once in the polynomial multiplication to reduce the space complexity It uses SPB and Mastrovito approach for the efficient time complexity. (M is called Mastrovito matrix corresponding to S1 mod xnm0+1 + xk + 1.) To this end, the polynomial multiplication AiBi is first implemented as the matrix-vector product. We compute the Mastrovito matrix M corresponding to S1 mod F(x) by reducing terms of S1 of degrees that are out of the range [−k, m − k − 1]. The four vectors e0, · · · , e3 are computed by two blocks in Fig. 1 (b)

BTX blocks

OVERALL COMPLEXITY FOR FIELD MULTIPLICATION C

COMPARISON

CONCLUSION